Enable 4-Pin Trace (ETM)

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To enable CoreSight ETM tracing on NXP LPC17xx devices:

• Connect J-Trace for Cortex to the board's Cortex Debug+ETM connector and to the host computer.
• Enable the Trace Port Interface as described in the LPC17xx User Manual chapter LPC17xx Pin Connect Block.
• Configure μVision to capture ETM trace data.

Enable the Trace Port Interface

1. Create a text file, for example conf_LPC17xx.ini, and enter the following code:

   /*-------------------------------------------------------------------** Define the function to enable the trace port**-----------------------------------------------------------------*/FUNC void EnableTPIU(void) {  _WDWORD(0x4002C028, 0x00000008);         // Enable TPIU in PINSEL10}/*-------------------------------------------------------------------** Invoke the function at debugger startup**-----------------------------------------------------------------*/EnableTPIU();

   ETM TRACEDATA[0..3] are output on the pins P2.5 through P2.2. The trace clock is configured on pin P2.6. PINSEL10.3 enables the trace functions for all trace pins P2.2 through P2.6. When PINSEL10.3 is set, it overwrites the configuration settings of PINSEL4 of the pin connect block.

   Use the _WDWORD command to configure the register, PINSEL10.3: _WDWORD(0x4002C028, 0x00000008);

2. Open the dialog Options for Target — Debug, and insert conf_LPC17xx.ini into the Initialization File field.

   

Configure μVision to capture ETM trace data

1. Enable Use, select Cortex-M/R J-LINK/J-Trace, and click Settings to open the Target Driver Setup dialog.

   

2. Click the Trace tab.

   

3. Set Enable and ETM Trace Enable.
4. Set Trace Port to Sync Trace Port with 4-bit Data.
5. The Core Clock must correspond to the device configuration.

Start the debugging session and verify the captured trace data with a μVision window.

Note

• Use the examples delivered with the Keil board MCB1700 as a reference.
• ETM tracing works in Serial Wire Debug as well as in JTAG Debug mode.